The TICkit 62 is the successor to the TICkit 57, an FBasic micro-controller. This device has capabilities of the previous TICkit 57 plus many improvements. Apply a 5 Vdc power supply and you have a fully functional micro-controller.
Features Include:
BYTE: 8bit unsigned Integer. ( 0 to 255 )
WORD: 16bit unsigned Integer. ( 0 to 65535 )
LONG: 32bit signed Integer. (-2147483688 to 2147483687 )
(
Long type may be used as fixed point with formatting )
Variable and Data Allocations: GLOBAL, LOCAL, SIZE, TYPE, ALIAS, PARAMETER
EEprom storage allocations: ALLOCATE, SEQUENCE, RECORD, FIELD, INITIAL
Function Declaration and Calling: FUNCTION, ENDFUNCTION, OPERATION, PROTOTYPE, EXIT, CALL, VECTOR
Flow Control, Testing, and Jumps: IF, ELSE, ELSEIF, ENDIF, REPEAT, WHILE, LOOP, UNTIL, GOTO, GOSUB, RETURN
Source File Manipulations: INCLUDE, LIBRARY, DEFINITION, IFDEFINED, IFNOTDEFINED, KEYWORD
Debugging and Testing Aids: BREAK, WATCH
Mathematics Operators: +, ++ , -, --, *, /, %
Assignment and Size Conversion: =, trunc_byte, trunc_word, to_word, to_long
Bitwise and Logic: and, or, xor, not, >>, <<
Relational Testing: ==, >=, <=, >, <, <>
Input and Output: pin_high, pin_low, pin_in, aport_get, dport_get, aport_set, dport_set, atris_get, dtris_get, atris_set, dtris_set,cycles, rc_measure, pulse_in_low, pulse_in_high, pulse_out_low, pulse_out_high, ee_read, ee_write, i2c_read, i2c_write
External Buss: buss_setup, buss_read, buss_write
Timing and Counting: delay, sleep, rtcc_get, rtcc_set, rtcc_int, rtcc_ext_rise, rtcc_ext_fall, rtcc_count, rtcc_wait
RS232: rs_param_set, rs_param_get, rs_send, rs_receive, rs_block, rs_delay, rs_stop_check, rs_stop_ignore, rs_break
Console: con_test, con_in_word, con_in_long, con_in_char, con_in_byte, con_out_char, con_out,
System: debug_on, debug_off, reset, irq_on, irq_off, irq_test, int_cont_set, int_cont_get, int_mask_set, int_mask_get, int_flag_set, int_flag_get
Peripheral: tmr1_cont_set, tmr1_cont_get, tmr1_count_set, tmr1_count_get, tmr2_cont _set, tmr2_cont_get, tmr2_count_set, tmr2_count_get, tmr2_period_set, tmr2_period_get, ccp1_cont_set, ccp1_cont_get, ccp1_reg_set, ccp1_reg_get, ssp_cont_set, ssp_cont_get, ssp_status_get, ssp_addr_set, ssp_addr_get, ssp_buffer_set, ssp_buffer_get
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Protean Logic Inc. Copyright 01/20/04 Top of Page